This application claims benefit of priority under 35 USC xc2xa7 119 to both Japanese Patent Applications No. 1999-321105, filed on Nov. 11, 1999, and No. 2000-085378, filed on Mar. 24, 2000, the entire contents of which are incorporated herein by reference herein.
1. Field of the Invention
The present invention relates to the field of testing for analyzing defects in semiconductor devices, and, more particularly, to a semiconductor testing method, and a semiconductor testing apparatus for deciding whether a semiconductor device is a good (non-defective) device having no defect or it contains defeats by using IDDQ testing technique, and a program for executing the semiconductor testing method, and the present invention also relates to a semiconductor testing method and a semiconductor testing apparatus for specifying one or more faulty parts involved in the semiconductor device.
2. Description of the Related Art
Recently, the circuit size of a semiconductor chip is enormously increased with an increase of the degree of a microstructure of a semiconductor circuit as a semiconductor device. It is therefore difficult to detect and specify the cause of a fault occurred in the complicated semiconductor circuit.
In particularly, the generation of test vectors to be used for detecting various faults in the semiconductor device with a higher detection rate requires considerable workers and long working time even if the test vectors are generated only by manual or an automatic test pattern generator (ATPG) that generate test vectors.
In addition, it is difficult to detect defects in a semiconductor device having a complicated structure and a large integrated size only by performing functional testing. In order to avoid this drawback, attention is being given to IDDQ testing having a higher detection rate as a new testing technology. This IDDQ testing is a testing method using existing test vectors capable of obtaining a higher detection rate.
By the way, conventionally, when existing test vectors are used in the measurement based on the IDDQ testing, a circuit designer selects the test vectors matched to target circuits for testing. Furthermore, an available IDDQ test vector extraction tool is used as one of recently effective testing methods in order to select effective test vectors.
However, it is considerably difficult to select effective test vectors for performing IDDQ measuring according to the circuit designer""s judgment, and the test vectors selected in estimation are not always effective for detecting defects. As a result, an operator cannot select the test vectors efficiently, and much time is thereby spent in measurement using no effective test vectors. In addition, the using of an available IDDQ test-vector extracting tool needs to keep the circumstance for the execution of this tool. That is, firstly, the available IDDQ test-vector extracting tool is selected, and this tool is then installed into a system including storage means such as a hard disk. Furthermore, it is necessary to convert information such as circuits and test vectors into data of a dedicated format that cFan be executed by this tool. This format conversion for the execution of the tool requires much working time. In order to avoid this drawback, it is sometimes necessary to develop a dedicated tool to be used only for this format conversion.
On the other hand, the available IDDQ test-vector extracting tool extracts only test vectors estimated by the execution of a computer simulation. Accordingly, all the estimated test vectors are not always effective. In general, it is often happened that a faulty item detected after actual mass production and before shipping has a limited faulty part in a circuit in the faulty item. On the contrary, because the available IDDQ test-vector extracting tool estimates and generates the test vectors based on the measurement for the entire circuits in a target semiconductor device, the estimated test vectors includes un-necessary test vectors in judgment of the defective item having a limited faulty part. This spends unnecessary much time in the IDDQ measurement. Moreover, in the prior art, the current value corresponding to a test vector is used in the judgment to detect and select a faulty sample. This judgment method decides a sample having a current value that is in excess of a standard current value as a faulty item, and a sample of a current value that is not more than a current-value criteria as a good sample (namely, a non-defective sample as a passed device that is within a manufacture""s tolerance level and may be sold to a customer). Accordingly, this conventional judgment method judges a sample as a passed device even if the current value of this sample has a larger current-value change rate, but not in excess of the current value criteria. This conventional judgment method misses to detect a faulty sample correctly.
By the way, there is a case that a manufacture cannot detect any defect in a semiconductor product that has been passed in manufacture""s testing (namely, the semiconductor product is within a manufacture""s tolerance level and may be sold to a customer), but returned from user as a fault product after shipping. To obtain the method to efficiently specify defects in the faulty product presents an important problem. For example, an emission analysis using the IDDQ testing has been performed. This mission analysis using the IDDQ testing measures a current value output from a target semiconductor circuit using existence test vectors. The emission analysis is then performed in order to detect defective parts in the faulty sample having unique emission by using the test vectors corresponding to the current values that are larger than the current value detected in the passed sample.
In the conventional emission analysis described above based on the IDDQ testing, all the unique emission parts detected in the faulty sample are used for the faulty analysis. This causes a time-wasting in the emission analysis because this emission analysis is performed based on the inefficient test vectors including the analysis for the emission parts that are not generated by the defects.
Recently, there is a possibility to flow the current continuously in the passed sample having a complicated circuit structure. This type of current gives no effect to the operation. On the contrary, the conventional emission analysis using the test vectors corresponding to the current values which are greater than that of the passed sample omits the faulty sample having the current value that is smaller than that of the passed sample from the emission analysis. That is, it is impossible to detect the faulty sample having a larger current value.
As described above, because the conventional emission analysis to analyze faulty samples is not always effective, there is no means to specify the position of a faulty part in the faulty sample having a small current value when compared with the current value flowing through the passed sample. Accordingly, it is difficult to obtain effective test vectors to be used during the emission measurement and to specify the defective part in the faulty sample. Thereby, the operator gives up the execution of the emission measurement using effective test vectors. Further, in the conventional method to specify the faulty part based on the current value data, because the current values between the passed sample and the faulty sample corresponding to a test vector are compared and the emission measurement is performed only when the current value of the faulty sample is greater than that of the passed sample, it has not performed to compare the emission parts in the faulty sample using the difference of current values per address pair indicating the test vectors. In other words, in the prior art there is no attention to consider the difference of the current values per test vector pair for each of the passed sample and the faulty sample. Thereby, the operator often misses to detect the phenomenon caused by the change of current values that occurs between the test vector and this phenomenon is also unique to the faulty sample, but is not caused in the passed sample.
Accordingly, an object of the present invention is, with due consideration to the drawbacks of the conventional technique, to provide a semiconductor testing method and a semiconductor testing apparatus for semiconductor devices, and a program for performing the semiconductor testing method. These method, apparatus, and program are capable of detecting faulty devices efficiently with a high faulty detection rate, and of specifying one or more defect parts in a faulty device that cannot be detected by any conventional semiconductor testing method, and of reducing the analysis time that is necessary to analyze the cause of the defects with a high throughput.
In accordance with a preferred embodiment of the present invention, a semiconductor testing apparatus comprises: a read circuit for reading measurement data including a plurality of test vectors; a measurement circuit for supplying the test vectors to semiconductor devices and for measuring a current value output from the semiconductor devices corresponding to each address of each test vector; a calculation circuit for calculating a current-value change rate per address pair consisting of different two addresses; a determination circuit for determining a range of pass/fail decision criteria to be used for deciding whether a semiconductor device as a target test device to be tested is a good sample or a fault sample based on current-value change rates obtained by supplying the plurality of test vectors to good samples as semiconductor devices; and a decision circuit for comparing current-value change rates obtained by supplying the plurality of test vectors to faulty samples with the range of pass/fail decision criteria per address pair, and for deciding whether the target test device is a good sample as a non-defective semiconductor device or a faulty sample based on the current-value change rates corresponding to the address pairs extracted based on the comparison results obtained.
In addition, in the semiconductor testing device, the determination circuit determines the range of pass/fail decision criteria based on the current-value change rates obtained from the plural good samples.
In the semiconductor testing apparatus, the range of pass/fail decision criteria is determined based on the current-value change rates obtained from the good samples, and the current-value change rates obtained from the target semiconductor device are then compared with the range of pass/fail decision criteria, so that it is possible to detect a faulty sample that cannot be detected by any conventional semiconductor testing apparatus.
It is also preferable that the determination circuit determines the range of pass/fail decision criteria based on a plurality of the current-value change rates obtained from the plural good (non-defective) samples (namely, from the passed samples).
In addition, the determination circuit in the semiconductor testing apparatus extracts the maximum value and the minimum value in a plurality of the current-value change rates per address pair and determines the range of pass/fail decision criteria per address pair based on the extracted them. Further, the determination circuit finally determines the range of pass/fail decision criteria in consideration of an desired error of the range of pass/fall decision criteria.
In the semiconductor testing apparatus as another preferred embodiment, the determination circuit comprises a measurement range determination circuit for comparing current-value change rates of the faulty samples obtained by supplying the plurality of test vectors to the faulty samples with the range of pass/fail decision criteria per address pair, and for extracting the address pairs corresponding to the current-value change rates of the faulty samples that are out of the range of pass/fail decision criteria from the plurality of address pairs in the plurality of test vectors, and for determining effective address pairs as an address pair group to be effectively used for the pass/fall decision. In the semiconductor testing apparatus, the measurement circuit supplies the test vectors corresponding to the address pair group to the target test device.
Thereby, it is possible to eliminate addresses (namely, test vectors) having a small detection rate to detect defects from the addresses that are used during a mass production testing. As a result, it is possible to extract effective test vectors that are substantially useful.
In the semiconductor testing apparatus as another preferred embodiment, it is further desirable that the measurement range determination circuit compares the plural current-value change rates obtained from the plural faulty samples with the range of pass/fail decision criteria per address pair, and selects an effective address pair group, to be effectively more used for the pass/fail decision and according to the number of the plural faulty samples, from the address pair group of the plural test vectors in the address pairs corresponding to the current-value change rates of the plural faulty samples which are out of the range of pass/fall decision criteria.
It is thereby possible to select the test vectors to be used during a mass production testing in order with a high defection efficiency. As a result, it is possible to further extract the test vectors according to a required specification.
In accordance with another preferred embodiment of the present invention, a semiconductor testing method comprises the steps of: inputting a plurality of test vectors to semiconductor devices each being a good devices as a non-defective device, and measuring a current value output from each good sample corresponding to an address of each test vector, and outputting the measured current values as the current values of the good samples; calculating a current-value change rate per address pair forming two different addresses, and outputting this current-value change rate as the current-value change rate of the good sample; determining a range of pass/fail decision criteria to be used for deciding whether a target test device to be tested is a good sample (non-defective sample) or a fault sample per address pair based on the above current-value change rates; and supplying the plural test vectors to semiconductor devices as faulty samples, and measuring current values output from the above semiconductor devices as the faulty samples corresponding to the addresses, and outputting the measured current values as the current values of the faulty samples; and comparing the current-value change rates of the measured current values corresponding to each address pair per address pair, and deciding whether a semiconductor device as a target test device to be tested is a good (non-defective) device or a faulty (defective) device based on the current-value change rates of the address pairs extracted based on the above comparison result.
In the semiconductor testing method of the present invention described above, the number of the semiconductor devices as the good samples is a plural number, and the current value and the current-value change rate of the good samples are output for each good sample, and the range of pass/fail decision criteria is determined based on the current-value change rates of the plural good samples.
In addition, the semiconductor testing method of the present invention described above further comprises the steps of: supplying the plurality of test vectors to semiconductor devices as faulty samples, and measuring current values output from these semiconductor devices corresponding to the address pairs, and outputting the current values of the faulty samples; calculating a change rate between the two current values in the above current values corresponding to each address pair, and outputting the calculated results as current-value change rates of the faulty samples; and comparing the current-value change rates of the faulty samples with the range of pass/fail decision criteria per address pair, and extracting effective address pairs, to be effectively used for the pass/fail decision, from the plural address pairs corresponding to the current-value change rates that are out of the range of pass/fail decision criteria, in the above semiconductor testing method, the step of measuring current values of the target test device is the step of measuring the current values by supplying the test vectors corresponding to the extracted effective address pairs for the pas/fail decision to the semiconductor device as the target test device.
Furthermore, in the semiconductor testing method of the present invention, the number of the semiconductor devices as the faulty samples are a plural number, and the current values and the current-value change rates of the faulty samples are output per faulty sample. The semiconductor testing method further comprises the steps of comparing the current-value change rates obtained from the plural faulty samples with the range of pass/fail decision criteria per address pair; and extracting the address pair group as an effective combination to be effectively used for the pass/fail decision from the plural address pairs corresponding to the current-value change rates of the faulty samples that are out of the pass/fail decision criteria, according to the number of the faulty samples. In the above method, the step of measuring the current values of the target test device is the step of supplying the test vectors corresponding to the effective address pairs to be effectively used for the pass/fail decision to the semiconductor device as the target test device.
Moreover, in accordance with another preferred of the present invention, a program with which a semiconductor testing method is executed by a computer in a semiconductor testing apparatus which comprises: a read circuit for reading measurement data including test vectors; a measurement circuit for supplying the test vectors to a semiconductor device and for measuring current values output from the semiconductor device; and a decision circuit for deciding whether a semiconductor device as a target test device is a good device (non-defective device) or it is a defective device based on the current values. The program comprises the procedures of; inputting a plurality of test vectors to semiconductor devices as good (non-defective) samples, and measuring a current value corresponding to an address of each test vector output from the good sample, and outputting the measured current values as the current values of the good samples; calculating a current-value change rate between two current values corresponding to an address pair forming two different addresses, and outputting the calculated current-value change rates as the current-value change rates of the good samples; determining a range of pass/fail decision criteria to be used for the criteria of the pass/fail decision whether a target test device to be tested is a good sample or a fault sample per address pair based on the current-value change rates of the good samples; supplying the plurality of the test vectors to semiconductor device as faulty samples, and measuring current values output from the semiconductor devices as the faulty samples corresponding to the addresses, and outputting the measured current values as the current values of the faulty samples; calculating a current-value change rate of the two current values corresponding to each address pair, and outputting current-value change rates as the current-value change rates of the faulty samples; and comparing the current-value change rate of the faulty samples with the range of pass/fail decision criteria per address pair, and deciding whether the semiconductor devices as the target test device is a good sample or a faulty sample based on the above comparison results.
According to the program of the present invention, it is possible to execute the semiconductor testing method described above to detect defects, that can not be detected by any conventional semiconductor testing method, with a high throughput in the semiconductor testing apparatus with a general purpose computer.
In the program of the present invention for executing the semiconductor testing method, the number of the semiconductor devices as the good samples is a plural number, the current values and the current-value change rates of the good samples are output per good sample, and the range of pass/fail decision criteria is determined based on the current-value change rates of the good samples.
Furthermore, the program of the present invention for executing the semiconductor testing method, further comprises the procedures of: supplying the plurality of the test vectors to semiconductor devices as faulty samples, and measuring current values output from the above semiconductor devices corresponding to the addresses of the test vectors, and outputting the measured current values as the current values of the faulty samples; and calculating a current-value change rate of the two current values corresponding to each address pair, and outputting the calculated results as the current-value change rates of the faulty samples; and comparing the current-value change rates of the faulty samples with the range of pass/fail decision criteria per address pair, and extracting effective address pairs, to be effectively used for the pass/fail decision, from the plural address pairs corresponding to the current-value change rates that are out of the range of pass/fail decision criteria. In the program, the step of measuring the current values of the target test device is the step of supplying the test vectors corresponding to the above extracted effective test vectors to the semiconductor device as the target test device.
Moreover, in the above-described program of the present invention, the number of the semiconductor devices as the faulty samples is a plural number, and the current values and the current-value change rates of the faulty samples are output per faulty sample; the above program for executing the semiconductor testing method further comprises the following procedures: the procedure of comparing the current-value change rates obtained from the plural faulty samples with the range of pass/fail decision criteria per address pair; and the procedure of extracting the address pairs to be effectively used for the pass/fail decision from the plural address pairs corresponding to the current-value change rates of the faulty samples that are out of the pass/fail decision criteria, according to the number of the faulty samples. In the program, the procedure of measuring the current values of the target test device is the procedure of supplying the test vectors corresponding to the extracted effective address pairs to the semiconductor device as the target test device.
In accordance with another preferred embodiment of the present invention, a semiconductor testing method of specifying a faulty part in a semiconductor product, comprises the steps of: supplying a plurality of test vectors to good and faulty samples as semiconductor devices, and measuring current values corresponding to addresses indicating the test vectors; calculating current-value change rates between current values corresponding to an address pair consisting of two addresses in each of the good and faulty samples; and comparing the current-value change rates corresponding to the address pairs in each of the good and faulty samples, and determining address pairs of the test vectors to be used for performing an emission analysis that is useful to specify a faulty part in a semiconductor device.
Moreover, the semiconductor testing method of specifying a faulty part in a semiconductor product of the present invention, further comprises the steps of: performing an emission analysis for each of the good and faulty samples by using the test vectors obtained in the steps of determining the address pairs of the test vectors to be used for performing the emission analysis; and specifying a faulty part by comparing emission patterns from the good sample with emission patterns from the faulty sample that have been obtained in the above emission analysis step.
Furthermore, in the emission analysis step in the semiconductor testing method of specifying a faulty part in a semiconductor product according to the present invention, different test vectors are supplied to each of the good and faulty samples in order to obtain emission patterns by changing the current values output from these samples, and in the faulty part specifying step, the faulty part is specified by obtaining a difference of the change of the emission patterns in each of the good and faulty samples.
Moreover, the semiconductor testing method of specifying a faulty part in a semiconductor product according to the present invention, further comprises the step of comparing the change of the emission parts in the good and faulty samples. In the faulty part specifying step in the above method, the emission area and the change of the emission area that do not occur in the good sample are detected and thereby the emission that is unique to the faulty sample is decided as the faulty part relating to the defeat.
Furthermore, in the step of calculating the current-value change rate in the above semiconductor testing method according to the present invention, two test vectors designated by two addresses are combined as an address pair, the range of the current-value change rates in the good and faulty samples are obtained according to the current-value change rates calculated by comparing the current values in optional number of the address pairs or in the test vectors in all the address pairs in each of the good and faulty samples.
Moreover, in the semiconductor testing method of the present invention, the current-value change rate between the test vectors per address pair in the faulty sample is compared with the current-value change rate between the test vectors in each address pair in the good sample, and the test vector pairs in the condition that the current-value change rate obtained from the faulty sample is out of the range of the current-value change rate obtained from the faulty sample are searched, and these test vector pairs are decided as the test vector group to be used for the emission measurement, and the test vector group is extracted as the address pairs of the test vectors that are used for specifying a faulty part in a semiconductor device.
In accordance with another preferred embodiment of the present invention, a semiconductor testing apparatus for specifying a faulty part in a semiconductor device, comprises: a current-value change measuring circuit for supplying a plurality of test vectors to good and faulty samples as semiconductor devices, and for measuring a current value corresponding to each test vector; a current-value change rate calculation circuit for calculating a current-value change rate per test vector pair in each of the good and faulty samples, the number of the test vector pairs being a desired number, by using the current values from the current-value measuring circuit; an emission measurement address pair determination circuit for comparing the current-value change rates in each test vector pair in each of the good and faulty samples obtained by the current-value change rate calculation circuit, and for determining test vectors to be used in an emission analysis based on the comparison results; an emission analysis circuit for performing the emission analysis using the test vectors determined above in each of the good and faulty samples; and a faulty part determination circuit for comparing emission patterns of the good and faulty samples, and for specifying a faulty part in a semiconductor device based on the result of the emission pattern comparison.
In the semiconductor testing method and the semiconductor testing apparatus according to the present invention described above, during the faulty analysis, the measurement data of current-values measured by using a plurality of test vectors of good (non-defective) and faulty samples, specifically that are returned from customers are calculated and then stored (into a memory device, for example), and the change rates of the stored current values between test vectors (namely, a test vector pair) are calculated in each of good and faulty samples. The current-value change rate in each test vector in the semiconductor device as the good sample is obtained based on the above calculated change rates, and then the current-value change rate in each faulty sample is compared with the range of the current-value change rate of the good sample per test vector pair. When the current-value change rate of the faulty sample is out of the range of the current-value change rate of the good sample, the test vector pair is extracted as the effective test vector group that is effectively use for specifying a faulty part. In the faulty part specifying process, the change of the emission part in the good sample using extracted test vectors is detected. By using the same test vector pairs described above, the emission parts in the faulty sample before and after the change of the current value is then compared in order to specify the change part in emission that does not occur in the good sample, but, that occurs in the faulty sample. This specified change part can be used for analyzing the cause of the defect in the faulty sample.